1/9 october 2002 STW20NK50Z n-channel 500v - 0.23 w - 17a to-247 zener-protected supermesh?power mosfet n typical r ds (on) = 0.23 w n extremely high dv/dt capability n 100% avalanche tested n gate charge minimized n very low intrinsic capacitances n very good manufacturing repeatibility description the supermesh? series is obtained through an extreme optimization of sts well established strip- based powermesh? layout. in addition to pushing on-resistance significantly down, special care is tak- en to ensure a very good dv/dt capability for the most demanding applications. such series comple- ments st full range of high voltage mosfets in- cluding revolutionary mdmesh? products. applications n high current, high speed switching n ideal for off-line power supplies, adaptors and pfc ordering information type v dss r ds(on) i d pw STW20NK50Z 500 v < 0.27 w 17 a 190 w sales type marking package packaging STW20NK50Z w20nk50z to-247 tube to-247 1 2 3 internal schematic diagram
STW20NK50Z 2/9 absolute maximum ratings ( l ) pulse width limited by safe operating area (1) i sd 17a, di/dt 200a/s, v dd v (br)dss , t j t jmax. (*) limited only by maximum temperature allowed thermal data avalanche characteristics gate-source zener diode protection features of gate-to-source zener diodes the built-in back-to-back zener diodes have specifically been designed to enhance not only the devices esd capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. in this respect the zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the devices integrity. these integrated zener diodes thus avoid the usage of external components. symbol parameter value unit v ds drain-source voltage (v gs = 0) 500 v v dgr drain-gate voltage (r gs = 20 k w ) 500 v v gs gate- source voltage 30 v i d drain current (continuous) at t c = 25c 17 a i d drain current (continuous) at t c = 100c 10.71 a i dm ( l ) drain current (pulsed) 68 a p tot total dissipation at t c = 25c 190 w derating factor 1.51 w/c v esd(g-s) gate source esd(hbm-c=100 pf, r=1.5 k w) 6000 v dv/dt (1) peak diode recovery voltage slope 4.5 v/ns t j t stg operating junction temperature storage temperature -55 to 150 -55 to 150 c c rthj-case thermal resistance junction-case max 0.66 c/w rthj-amb thermal resistance junction-ambient max 62.5 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 17 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 850 mj symbol parameter test conditions min. typ. max. unit bv gso gate-source breakdown voltage igs= 1ma (open drain) 30 v
3/9 STW20NK50Z electrical characteristics (t case =25c unless otherwise specified) on/off dynamic switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. 3. c oss eq. is defined as a constant equivalent capacitance giving the same charging time as c oss when v ds increases from 0 to 80% v dss . symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 500 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c = 125 c 1 50 a a i gss gate-body leakage current (v ds = 0) v gs = 20 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 100 a 3 3.75 4.5 v r ds(on) static drain-source on resistance v gs = 10v, i d = 8.5 a 0.23 0.27 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds = 15 v , i d = 8.5 a 13 s c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 25v, f = 1 mhz, v gs = 0 2600 328 72 pf pf pf c oss eq. (3) equivalent output capacitance v gs = 0v, v ds = 0v to 640v 187 pf symbol parameter test conditions min. typ. max. unit t d(on) t r turn-on delay time rise time v dd = 250 v, i d = 8.5 a r g = 4.7 w , v gs = 10 v (resistive load see, figure 3) 28 20 ns ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 400 v, i d = 17 a, v gs = 10 v 85 15.5 42 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f turn-off delay time fall time v dd = 250 v, i d = 8.5 a r g =4.7 w , v gs = 10 v (resistive load see, figure 3) 70 15 ns ns t r(voff) t f t c off-voltage rise time fall time cross-over time v dd = 400 v, i d = 17 a, r g =4.7 w, v gs = 10v (inductive load see, figure 5) 16 15 30 ns ns ns symbol parameter test conditions min. typ. max. unit i sd i sdm (2) source-drain current source-drain current (pulsed) 17 68 a a v sd (1) forward on voltage i sd = 17 a, v gs = 0 1.6 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 17 a, di/dt = 100 a/s v r = 100 v, t j = 150c (see test circuit, figure 5) 355 5.72 26 ns c a
STW20NK50Z 4/9 transfer characteristics output characteristics static drain-source on resistance transconductance thermal impedance for to-247 safe operating area for to-247
5/9 STW20NK50Z normalized bvdss vs temperature gate charge vs gate-source voltage capacitance variations normalized on resistance vs temperature normalized gate threshold voltage vs temp. source-drain diode forward characteristics
STW20NK50Z 6/9 maximum avalanche energy vs temperature
7/9 STW20NK50Z fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
STW20NK50Z 8/9 dim. mm. inch min. typ max. min. typ. max. a 4.85 5.15 0.19 0.20 d 2.20 2.60 0.08 0.10 e 0.40 0.80 0.015 0.03 f 1 1.40 0.04 0.05 f1 3 0.11 f2 2 0.07 f3 2 2.40 0.07 0.09 f4 3 3.40 0.11 0.13 g 10.90 0.43 h 15.45 15.75 0.60 0.62 l 19.85 20.15 0.78 0.79 l1 3.70 4.30 0.14 0.17 l2 18.50 0.72 l3 14.20 14.80 0.56 0.58 l4 34.60 1.36 l5 5.50 0.21 m 2 3 0.07 0.11 v 5 o5o v2 60o 60o dia 3.55 3.65 0.14 0.143 to-247 mechanical data
9/9 STW20NK50Z information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com
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